Impala Linear Corporation
ILC1232
mP Supervisory Circuit
General Description
The ILC1232 is a multifunction circuit which monitors micro-
processor activity, external reset and power supplies in
microprocessor based systems. The circuit functions
include a watchdog timer, power supply monitor, micro-
processor reset, and manual pushbutton reset input.
The power supply line is monitored with a comparator and
an internal voltage reference. RST is forced low when an
out-of-tolerance condition exists and remains asserted for
at least 250ms after V
CC
rises above the threshold voltage
(4.5V or 4.75V). The RST pin will remain logic low with V
CC
as low as 1.4V.
The Watchdog input (ST) monitors mP activity and will
assert RST if no mP activity has occurred within the watch-
dog timeout period. The watchdog timeout period is selec-
table with nominal periods of 150, 600, or 1200 milliseconds.
Features
•
Power OK/Reset Time Delay, 250ms min.
•
Watchdog Timer, 150ms, 600ms, or 1.2s typical
•
Precision Supply Voltage Monitor, Select Between 5% or
10% of Supply Voltage
•
18µA Supply Current
•
Debounced External Reset Input
•
8-Pin SO Package
Applications
•
•
•
•
•
Computers
Controllers
Critical Microprocessor Power Monitoring
Intelligent Instruments
Portable Equipment
Ordering Information
Part
ILC1232N
ILC1232M
Package
8-Lead PDIP
8-Lead SOIC
Temp. Range
-40°C to +85°C
-40°C to +85°C
Typical Circuit
V
CC
Pin Package Configurations
Top View
V
CC
TD
V
CC
µ
P
ST
RST
TOL
GND
ETC1232N - 8 Lead Plastic DIP Package
ETC1232M - 8 Lead Plastic SOIC Package
PBRST
1
8
7
V
CC
ST
RST
RST
ILC1232
PBRST
I/O
RESET
TD
2
ILC1232
TOL
3
GND
4
6
5
Impala Linear Corporation
ILC1232 1.1
(408) 574-3939
www.impalalinear.com
Sept 1999
1
1
ILC1232 mP Supervisory Circuit
Sept 1999
Absolute Maximum Ratings
Parameter
Terminal Voltage
Input Current
Symbol
V
CC
All other inputs
V
CC
GND, All other
inputs
T
A
Ratings
-0.3 to 6.0
-0.3 to (V
CC
+ 0.3)
250
25
-40 to +85
-65 to +150
300
700
Units
V
V
mA
mA
°C
°C
°C
mW
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Power Dissipation
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliabil-
ity. Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characterisitcs
V
CC
= 4.5 V to 5.5 V, T
A
= Operating Temperature Range, unless otherwise noted.
Parameter
Conditions
Min
Operating Voltage Range, V
CC
4.5
Supply Current, I
CC
(See Note 1)
ST and PBRST Input Levels
Input Leakage, I
IL
Output Source Current, RST
Output Sink Current, RST, RST
V
CC
5% Trip Point (Reset Threshold Voltage)
V
CC
10% Trip Point (Reset Threshold Voltage)
Input Capacitance, ST, TOL
Output Capacitance, RST, RST
PBRST Min. Pulse Width, t
PB
PBRST Delay, t
PBD
Reset Active Time, t
RST
ST Pulse Width, t
ST
ST Timeout Period, t
TD
V
OH
= 2.4V
V
OL
= 0.4V
TOL= GND
TOL= V
CC
C
IN
(See Note 3)
C
OUT
(See Note 3)
PBRST = V
IL
(See Note 4)
1.0
2.0
4.50
4.25
10
10
4.62
4.37
V
IH
(See Note 2)
V
IL
2.0
-0.3
Typ
18
Max
5.5
40
V
CC
+ 0.3
0.8
1
Units
V
µA
V
µA
mA
mA
V
V
pF
pF
ms
ms
ms
ns
ms
4.74
4.49
5
7
20
1000
250
1000
2000
TD = 0V
TD = Open
TD = V
CC
V
CC
Fall Time, t
F
V
CC
Rise Time, t
R
V
CC
Detect to RST Low and RST High, tRPD
V
CC
Detect to RST Open and RST Low, tRPU
V
CC
Falling at 1.66 mV/µs
V
CC
Rising (See Note 5)
20
1
250
20
62.5
250
500
10
0
4
610
150
600
1200
µs
ns
50
150
1000
610
µs
ms
250
Note
Note
Note
Note
Note
1:
2:
3:
4:
5:
I
CC
is measured with outputs open and inputs within 0.5V of supply rails.
PBRST has an internal 40kΩ (typical) pull-up resistor to V
CC
.
Guaranteed by design.
PBRST must be held low for a minimum of 20ms to guarantee a reset.
RST has an open drain output.
Impala Linear Corporation
ILC1232 1.1
(408) 574-3939
www.impalalinear.com
June 1999
2
ILC1232 mP Supervisory Circuit
Sept 1999
Pin Functions
Pin
Number
1
Pin
Name
PBRST
Description
Pushbutton reset input. This input is debounced and can be driven with
external logic signals or a mechanical push button to actively force a reset.
All pulses less than 1ms in duration on the PBRST pin are ignored. Any
pulse with a duration of 20ms or greater is guaranteed to cause a reset.
Time delay input. This input selects the timebase used by the watchdog
timer. When TD = 0V, the watchdog timeout period is set to a nominal
value of 150ms, when TD = open, the watchdog timeout period is set to a
nominal value of 600ms and when TD = V
CC
, the watchdog timeout period
is 1.2 sec nominally.
Tolerance select input. Selects whether 5% or 10% of V
CC
is used as the
reset threshold voltage. When TOL = 0 V, the 5% tolerance level is
selected and when TOL = V
CC
, a 10% tolerance level is selected.
Ground pin, 0V reference.
RST is asserted high if either V
CC
goes below the reset threshold, the
watchdog times out or PBRST is pulled low for a minimum of 20ms. RST
remains asserted for one reset timeout period after V
CC
exceeds the reset
threshold or after the watchdog times out or after PBRST goes high.
RST is asserted low if either V
CC
goes below the reset threshold, the
watchdog times out or PBRST is pulled low for a minimum of 20ms. RST
remains asserted for one reset timeout period after V
CC
exceeds the reset
threshold or after the watchdog times out or after PBRST goes high.
Open-drain output.
Input to the watchdog timer. If ST does not see a transition from high to
low within the watchdog timeout period, RST and RST will be asserted.
Power supply input, 5V.
2
TD
3
TOL
4
5
GND
RST
6
RST
7
8
ST
V
CC
Block Diagram
V
CC
8
Trip Point
Select
+
-
Reset
Generator
6
RST
TOL
3
Ref
5
RST
PBRST
1
Manual Reset
Debounce
ST
7
Timeout
Select
Watchdog
Timer
4
TD
2
GND
Impala Linear Corporation
ILC1232 1.1
(408) 574-3939
www.impalalinear.com
June 1999
3
ILC1232 mP Supervisory Circuit
Sept 1999
Circuit Decription
Power Monitor
The RST and RST pins are asserted whenever V
CC
falls
below the reset threshold voltage set by the TOL pin. A 5%
tolerance level (4.62V reset threshold voltage) can be
selected by connecting the TOL pin to ground or a 10% tol-
erance (4.37V reset threshold voltage) can be selected by
connecting the TOL pin to V
CC
. The reset pins will remain
asserted for a period of 250ms after V
CC
has risen above
the reset threshold voltage. The reset function ensures the
microprocessor is properly reset and powers up into a
known condition after a power failure. RST will remain valid
with V
CC
as low as 1.4V.
V
CCTP
V
CCTP
Pushbutton Reset Input
The PBRST input can be driven with a manual pushbutton
switch or with external logic signals. The input is internally
debounced and requires an active low signal to force the
reset outputs into their active states. The PBRST input will
recognize any pulse that is 20ms in duration or greater and
will ignore all pulses that are less than 1ms in duration.
t
PB
PBRST
t
PDLY
RST
V
CC
t
RST
RST
t
RPD
RST
t
RPU
RST
Pushbutton Reset
Power-Up/Power-Down Sequence
Watchdog Timer
The microprocessor can be monitored by connecting the ST
pin (watchdog input) to a bus line or I/O line. If a high-to-low
transition does not occur on the ST pin within the watchdog
timeout period set by the TD pin (see Table 1), the RST and
RST pins will be asserted resulting in a microprocessor
reset. RST and RST will remain asserted for 250ms when
this occurs. A minimum pulse of 75ns or any transition high-
to-low on the ST pin will reset the watchdog timer. The
watchdog timer will be reset if ST sees a valid transition
within the watchdog timeout period.
TD Pin
GND
Open
V
CC
Min.
62.5ms
250ms
500ms
t
TD
Typ.
150ms
600ms
1200ms
Max.
250ms
1000ms
2000ms
Table 1: Watchdog Timeout Period
Alternate Cross Reference Guide
Industry P/N
DS1232LP
DS1232LPS-2
DS1232
DS1232LPN
DS1232LPSN-2
DS1232N
MAX1232CPA
MAX1232CSA
MAX1232EPA
MAX1232ESA
MAX1232C/D
ILC Direct
Replacement
ILC1232N
ILC1232M
ILC1232N
ILC1232N
ILC1232M
ILC1232N
ILC1232N
ILC1232M
ILC1232N
ILC1232M
ILC1232D
t
SD
ST
t
TD
Watchdog Input
Impala Linear Corporation
ILC1232 1.1
(408) 574-3939
www.impalalinear.com
June 1999
4
ILC1232 mP Supervisory Circuit
Sept 1999
Packaging Information
0.197
0.190
M Package, 8-Pin Small Outline
Pin 1 identifier
0.155
0.150
0.244
0.228
0.069
0.053
0.060
0.040
0.019
0.013
0.012
0.009
0.8°
0.011
0.004
0.050
0.016
Tape and Reel Information
0.019
0.013
N Package, 8-Pin Plastic Dual-In-Line
0.260
0.240
0.260
0.240
0.260
0.240
0.260
0.240
0.260
0.240
0.260
0.240
0.260
0.240
0.260
0.240
Devices sold by Impala Linear Corporation are covered by the warranty and patent indemnification provisions appearing
in its Terms of Sale only. Impala Linear Corporation makes no warranty, express, statutory, implied, or by description
regarding the information set forth herein or regarding the freedom of the described devices from patent infringement.
Impala Linear Corporation makes no warranty of merchantability or fitness for any purpose. Impala Linear Corporation
reserves the right to discontinue production and change specifications and prices at any time and without notice.
This product is intended for use in normal commercial applications. Applications requiring an extended temperature
range, unusual environmental requirements, or high reliability applications, such as military and aerospace, are specif-
ically not recommended without additional processing by Impala Linear Corporation.
Impala Linear Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an
Impala Linear Corporation product. No other circuits, patents, licenses are implied.
Life Support Policy
Impala Linear Corporation’s products are not authorized for use as critical components in life support devices or systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use pro-
vided in the labelling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reason-
bly expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
Impala Linear Corporation
ILC1232 1.1
(408) 574-3939
www.impalalinear.com
June 1999
5
